Reference

How the Sparsr machine works.

Every path through these docs runs on the same processor, so this chapter is shared. Read it whether you write kernels yourself or use a library built on top of Sparsr.

Pages in this chapter

• Architecture — the host, the accelerator, and how work moves between them.
  • Memory Model (CMEM & DMEM) — the three on-chip memories, their geometry, and the compression format.
• Instruction Set Architecture (ISA) — every scalar and wide instruction, with encodings.
• Sparsr VM — the device model that runs RV32I on your own CPU. It passes the RISC-V conformance suite.
• Software Emulator — the older software device, which runs Sparsr Assembly and matches the FPGA.